Metal Gate CMOS Integrated Circuits

QuickSil's Metal Gate CMOS (MGCMOS) provides a base process for a number of cost-effective solutions.

Because QuickSil uses UT1000WF steppers, the yields of the resultant wafers are both high and repeatable. Because the process is fully channel stopped (field implants), it does not display the leakage types often observed in other low voltage CMOS processes.

The base process is used to build both P and N-well circuits and can incorporate implanted resistors and dual level metal. We believe that we are the first foundry to offer dual level metal on metal gate CMOS. The implant resistors (up to 2K Ω/square) are used to provide high value resistors in minimum area (minimum width 3 microns, minimum spacing 5 microns). The dual metal capability is very useful in building low resistance transistors (<100 milli-Ω) and reducing chip area where this is a premium.

Printing:        UT1000 WF

Resist:           Positive-working resist

Diffusion:      Bruce DDC

Wafers:         125mm (5")

PECVD:          Novellus Concept 1

Metal:            Varian 3190 (includes RF etch capability)

Process:        N-well and P-well available

                      CMOS, PMOS, and NMOS options

                      Fully field implanted

                      Dual level metal available

                      Minimum contact size: 3 X 3 microns

                      Minimum P+, N+ widths: 3 microns

                      Minimum N+ to N+ spacing: 5 microns

                      Minimum P+ to P+ spacing: 5 microns